*BSD News Article 91688


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From: jca@bighorn.accessnv.com (J.C. Archambeau)
Newsgroups: comp.unix.bsd.freebsd.misc
Subject: Re: Am5x86/P75 WB caching...
Date: 21 Mar 1997 01:27:37 GMT
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Steinar Haug (sthaug@nethelp.no) wrote:

:| I just upgraded the CPU in my EISA/VLB motherboard from an i486DX/33 to
:| an AMD Am5x86/P75 (133).  FreeBSD (2.2-BETA) properly indentifies the CPU,
:| but it states that the L1 cache is in write through mode at bootup.  Does
:| FreeBSD disable write back caching of the Am5x86?  If it does, what
:| define or kernel configuration parameter do I need to change?

: FreeBSD works fine with writeback. Here's the boot info from a 5x86-133
: running in an ASUS PVI-486SP3 motherboard:

: FreeBSD 2.2-BETA_A #1: Sun Jan 12 15:25:39 MET 1997
:     sthaug@bizet.nethelp.no:/local/usr/src/sys/compile/GATE
: Calibrating clock(s) relative to mc146818A clock ... i8254 clock: 1193220 Hz
: CPU: AMD Am5x86 Write-Back (486-class CPU)
:   Origin = "AuthenticAMD"  Id = 0x4f4
: real memory  = 25165824 (24576K bytes)
: avail memory = 22835200 (22300K bytes)

: At least on this motherboard you need to enable writeback with a jumper.

Is there a way to force FreeBSD to enable write back caching though?  It
may not be enabling it for my particular chipset (SiS EISA chipset).  I
know that write back is working from MS-DOS and Win 3.x because of
the results of various utilities (i.e. cachchk6).
--
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