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From: stripes@pix.com (Josh Osborne)
Subject: Re: DMA disk controllers
Message-ID: <BwwBIB.7r3@pix.com>
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Organization: Pix Technologies -- The company with no adult supervision
References: <1992Oct26.062909@eklektix.com> <720149795snx@grendel.demon.co.uk> <1735@optigfx.optigfx.com>
Date: Thu, 29 Oct 1992 18:32:33 GMT
Lines: 27
In article <1735@optigfx.optigfx.com> mrm@optigfx.optigfx.com (Mike Murphy) writes:
[...]
>:No, when a DMA controller is in burst mode (which would be the mode used
>:for disc and network controllers where the data to be moved resides in
>:or is going to a memory buffer on the controller), the bus is completely
>:seized by the DMA controller for the duration of the transfer. There are
>:no CPU cyles left.
>
>Probably a good argument for throttled DMA, e.g. transfer four words,
>give up the bus, transfer four words, give up the bus,...
It's even more important then you might think. According to MindShare's
ISA book many (if not most) boards do NOT do a DRAM refresh while block mode
DMA is going on, so if you do DMA with really big blocks you will miss enough
refresh cycles to lose data in the DRAM's, which should show up as a NMI
or parity error...
[...]
>The DMA on the ISA BUS PC is worse than 3-cycle DMA on a PDP-8.
But ISA PC's cost less then the PDP ever did...
--
stripes@pix.com "Security for Unix is like
Josh_Osborne@Real_World,The Multitasking for MS-DOS"
"The dyslexic porgramer" - Kevin Lockwood
We all agree on the necessity of compromise. We just can't agree on
when it's necessary to compromise. - Larry Wall