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From: "Jordan K. Hubbard" <jkh@FreeBSD.org>
Newsgroups: comp.unix.bsd.freebsd.misc
Subject: Re: FreeBSD-STABLE and Intel PRO100 PCI lan adapter
Date: Tue, 05 Mar 1996 19:19:19 -0800
Organization: Walnut Creek CDROM
Lines: 1478
Message-ID: <313D0437.41C67EA6@FreeBSD.org>
References: <4h8b1d$4ti@newsbf02.news.aol.com> <aak2.825884863@Ra.MsState.Edu>
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Atif Ahmad Khan wrote:
> I would also appreciate information on this subject. I have
> just acquired an Intel Pro100 PCI ethernet card and would like
Here's the driver..
You need to add this to /sys/conf/files:
pci/if_fxp.c optional fxp device-driver
Add a `device fxp0' to your kernel config file and extract
the attached shar file into /sys/pci.
Note: I'm doing this as a public service and will NOT SUPPORT the
surgery this requires for 2.1. If you have problems integrating this,
you're on your own! Sorry, but I really can't afford the time otherwise
right now.
Jordan
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# This is a shell archive. Save it in a file, remove anything before
# this line, and then unpack it by entering "sh file". Note, it may
# create directories; files and directories will be owned by you and
# have default permissions.
#
# This archive contains:
#
# if_fxpreg.h
# if_fxp.c
#
echo x - if_fxpreg.h
sed 's/^X//' >if_fxpreg.h << 'END-of-if_fxpreg.h'
X/*
X * Copyright (c) 1995, David Greenman
X * All rights reserved.
X *
X * Redistribution and use in source and binary forms, with or without
X * modification, are permitted provided that the following conditions
X * are met:
X * 1. Redistributions of source code must retain the above copyright
X * notice unmodified, this list of conditions, and the following
X * disclaimer.
X * 2. Redistributions in binary form must reproduce the above copyright
X * notice, this list of conditions and the following disclaimer in the
X * documentation and/or other materials provided with the distribution.
X * 3. All advertising materials mentioning features or use of this software
X * must display the following acknowledgement:
X * This product includes software developed by David Greenman.
X * 4. The name of the author may not be used to endorse or promote products
X * derived from this software without specific prior written permission.
X *
X * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
X * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
X * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
X * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
X * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
X * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
X * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
X * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
X * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
X * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
X * SUCH DAMAGE.
X *
X * $Id: if_fxpreg.h,v 1.2 1995/12/05 11:49:55 davidg Exp $
X */
X
X#define FXP_VENDORID_INTEL 0x8086
X#define FXP_DEVICEID_i82557 0x1229
X
X#define FXP_PCI_MMBA 0x10
X#define FXP_PCI_IOBA 0x14
X
Xstruct fxp_csr {
X volatile u_int8_t :2,
X scb_rus:4,
X scb_cus:2;
X volatile u_int8_t scb_statack;
X volatile u_int8_t scb_command;
X volatile u_int8_t scb_intrcntl;
X volatile u_int32_t scb_general;
X volatile u_int32_t port;
X volatile u_int16_t flash_control;
X volatile u_int16_t eeprom_control;
X volatile u_int32_t mdi_control;
X};
X
X#define FXP_SCB_RUS_IDLE 0
X#define FXP_SCB_RUS_SUSPENDED 1
X#define FXP_SCB_RUS_NORESOURCES 2
X#define FXP_SCB_RUS_READY 4
X#define FXP_SCB_RUS_SUSP_NORBDS 9
X#define FXP_SCB_RUS_NORES_NORBDS 10
X#define FXP_SCB_RUS_READY_NORBDS 12
X
X#define FXP_SCB_CUS_IDLE 0
X#define FXP_SCB_CUS_SUSPENDED 1
X#define FXP_SCB_CUS_ACTIVE 2
X
X#define FXP_SCB_STATACK_SWI 0x04
X#define FXP_SCB_STATACK_MDI 0x08
X#define FXP_SCB_STATACK_RNR 0x10
X#define FXP_SCB_STATACK_CNA 0x20
X#define FXP_SCB_STATACK_FR 0x40
X#define FXP_SCB_STATACK_CXTNO 0x80
X
X#define FXP_SCB_COMMAND_MASK 0xff
X#define FXP_SCB_COMMAND_CU_NOP 0x00
X#define FXP_SCB_COMMAND_CU_START 0x10
X#define FXP_SCB_COMMAND_CU_RESUME 0x20
X#define FXP_SCB_COMMAND_CU_DUMP_ADR 0x40
X#define FXP_SCB_COMMAND_CU_DUMP 0x50
X#define FXP_SCB_COMMAND_CU_BASE 0x60
X#define FXP_SCB_COMMAND_CU_DUMPRESET 0x70
X
X#define FXP_SCB_COMMAND_RU_NOP 0
X#define FXP_SCB_COMMAND_RU_START 1
X#define FXP_SCB_COMMAND_RU_RESUME 2
X#define FXP_SCB_COMMAND_RU_ABORT 4
X#define FXP_SCB_COMMAND_RU_LOADHDS 5
X#define FXP_SCB_COMMAND_RU_BASE 6
X#define FXP_SCB_COMMAND_RU_RBDRESUME 7
X
X/*
X * Command block definitions
X */
Xstruct fxp_cb_nop {
X volatile u_int16_t cb_status;
X volatile u_int16_t cb_command;
X volatile u_int32_t link_addr;
X};
Xstruct fxp_cb_ias {
X volatile u_int16_t cb_status;
X volatile u_int16_t cb_command;
X volatile u_int32_t link_addr;
X volatile u_int8_t macaddr[6];
X};
X/* I hate bit-fields :-( */
Xstruct fxp_cb_config {
X volatile u_int16_t cb_status;
X volatile u_int16_t cb_command;
X volatile u_int32_t link_addr;
X volatile u_int8_t byte_count:6,
X :2;
X volatile u_int8_t rx_fifo_limit:4,
X tx_fifo_limit:3,
X :1;
X volatile u_int8_t adaptive_ifs;
X volatile u_int8_t :8;
X volatile u_int8_t rx_dma_bytecount:7,
X :1;
X volatile u_int8_t tx_dma_bytecount:7,
X dma_bce:1;
X volatile u_int8_t late_scb:1,
X :1,
X tno_int:1,
X ci_int:1,
X :3,
X save_bf:1;
X volatile u_int8_t disc_short_rx:1,
X underrun_retry:2,
X :5;
X volatile u_int8_t mediatype:1,
X :7;
X volatile u_int8_t :8;
X volatile u_int8_t :3,
X nsai:1,
X preamble_length:2,
X loopback:2;
X volatile u_int8_t linear_priority:3,
X :5;
X volatile u_int8_t linear_pri_mode:1,
X :3,
X interfrm_spacing:4;
X volatile u_int8_t :8;
X volatile u_int8_t :8;
X volatile u_int8_t promiscuous:1,
X bcast_disable:1,
X :5,
X crscdt:1;
X volatile u_int8_t :8;
X volatile u_int8_t :8;
X volatile u_int8_t stripping:1,
X padding:1,
X rcv_crc_xfer:1,
X :5;
X volatile u_int8_t :6,
X force_fdx:1,
X fdx_pin_en:1;
X volatile u_int8_t :6,
X multi_ia:1,
X :1;
X volatile u_int8_t :3,
X mc_all:1,
X :4;
X};
Xstruct fxp_tbd {
X volatile u_int32_t tb_addr;
X volatile u_int32_t tb_size;
X};
X
Xstruct fxp_cb_tx {
X volatile u_int16_t cb_status;
X volatile u_int16_t cb_command;
X volatile u_int32_t link_addr;
X volatile u_int32_t tbd_array_addr;
X volatile u_int16_t byte_count;
X volatile u_int8_t tx_threshold;
X volatile u_int8_t tbd_number;
X /*
X * The following isn't actually part of the TxCB.
X */
X volatile struct fxp_tbd tbd[29];
X struct mbuf *mb_head;
X struct fxp_cb_tx *next;
X};
X
X/*
X * Control Block (CB) definitions
X */
X
X/* status */
X#define FXP_CB_STATUS_OK 0x2000
X#define FXP_CB_STATUS_C 0x8000
X/* commands */
X#define FXP_CB_COMMAND_NOP 0x0
X#define FXP_CB_COMMAND_IAS 0x1
X#define FXP_CB_COMMAND_CONFIG 0x2
X#define FXP_CB_COMMAND_MAS 0x3
X#define FXP_CB_COMMAND_XMIT 0x4
X#define FXP_CB_COMMAND_RESRV 0x5
X#define FXP_CB_COMMAND_DUMP 0x6
X#define FXP_CB_COMMAND_DIAG 0x7
X/* command flags */
X#define FXP_CB_COMMAND_SF 0x0008 /* simple/flexible mode */
X#define FXP_CB_COMMAND_I 0x2000 /* generate interrupt on completion */
X#define FXP_CB_COMMAND_S 0x4000 /* suspend on completion */
X#define FXP_CB_COMMAND_EL 0x8000 /* end of list */
X
X/*
X * RFA definitions
X */
X
Xstruct fxp_rfa {
X volatile u_int16_t rfa_status;
X volatile u_int16_t rfa_control;
X volatile u_int32_t link_addr;
X volatile u_int32_t rbd_addr;
X volatile u_int16_t actual_size;
X volatile u_int16_t size;
X};
X#define FXP_RFA_STATUS_RCOL 0x0001 /* receive collision */
X#define FXP_RFA_STATUS_IAMATCH 0x0002 /* 0 = matches station address */
X#define FXP_RFA_STATUS_S4 0x0010 /* receive error from PHY */
X#define FXP_RFA_STATUS_TL 0x0020 /* type/length */
X#define FXP_RFA_STATUS_FTS 0x0080 /* frame too short */
X#define FXP_RFA_STATUS_OVERRUN 0x0100 /* DMA overrun */
X#define FXP_RFA_STATUS_RNR 0x0200 /* no resources */
X#define FXP_RFA_STATUS_ALIGN 0x0400 /* alignment error */
X#define FXP_RFA_STATUS_CRC 0x0800 /* CRC error */
X#define FXP_RFA_STATUS_OK 0x2000 /* packet received okay */
X#define FXP_RFA_STATUS_C 0x8000 /* packet reception complete */
X#define FXP_RFA_CONTROL_SF 0x08 /* simple/flexible memory mode */
X#define FXP_RFA_CONTROL_H 0x10 /* header RFD */
X#define FXP_RFA_CONTROL_S 0x4000 /* suspend after reception */
X#define FXP_RFA_CONTROL_EL 0x8000 /* end of list */
X
X/*
X * Statistics dump area definitions
X */
Xstruct fxp_stats {
X volatile u_int32_t tx_good;
X volatile u_int32_t tx_maxcols;
X volatile u_int32_t tx_latecols;
X volatile u_int32_t tx_underruns;
X volatile u_int32_t tx_lostcrs;
X volatile u_int32_t tx_deffered;
X volatile u_int32_t tx_single_collisions;
X volatile u_int32_t tx_multiple_collisions;
X volatile u_int32_t tx_total_collisions;
X volatile u_int32_t rx_good;
X volatile u_int32_t rx_crc_errors;
X volatile u_int32_t rx_alignment_errors;
X volatile u_int32_t rx_rnr_errors;
X volatile u_int32_t rx_overrun_errors;
X volatile u_int32_t rx_cdt_errors;
X volatile u_int32_t rx_shortframes;
X volatile u_int32_t completion_status;
X};
X#define FXP_STATS_DUMP_COMPLETE 0xa005
X#define FXP_STATS_DR_COMPLETE 0xa007
X
X/*
X * Serial EEPROM control register bits
X */
X/* shift clock */
X#define FXP_EEPROM_EESK 0x01
X/* chip select */
X#define FXP_EEPROM_EECS 0x02
X/* data in */
X#define FXP_EEPROM_EEDI 0x04
X/* data out */
X#define FXP_EEPROM_EEDO 0x08
X
X/*
X * Serial EEPROM opcodes, including start bit
X */
X#define FXP_EEPROM_OPC_ERASE 0x4
X#define FXP_EEPROM_OPC_WRITE 0x5
X#define FXP_EEPROM_OPC_READ 0x6
END-of-if_fxpreg.h
echo x - if_fxp.c
sed 's/^X//' >if_fxp.c << 'END-of-if_fxp.c'
X/*
X * Copyright (c) 1995, David Greenman
X * All rights reserved.
X *
X * Redistribution and use in source and binary forms, with or without
X * modification, are permitted provided that the following conditions
X * are met:
X * 1. Redistributions of source code must retain the above copyright
X * notice unmodified, this list of conditions, and the following
X * disclaimer.
X * 2. Redistributions in binary form must reproduce the above copyright
X * notice, this list of conditions and the following disclaimer in the
X * documentation and/or other materials provided with the distribution.
X * 3. All advertising materials mentioning features or use of this software
X * must display the following acknowledgement:
X * This product includes software developed by David Greenman.
X * 4. The name of the author may not be used to endorse or promote products
X * derived from this software without specific prior written permission.
X *
X * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
X * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
X * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
X * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
X * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
X * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
X * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
X * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
X * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
X * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
X * SUCH DAMAGE.
X *
X * $Id: if_fxp.c,v 1.8.2.1 1996/01/29 12:59:47 davidg Exp $
X */
X
X/*
X * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
X */
X
X#include "bpfilter.h"
X
X#include <sys/param.h>
X#include <sys/systm.h>
X#include <sys/ioctl.h>
X#include <sys/mbuf.h>
X#include <sys/malloc.h>
X#include <sys/kernel.h>
X#include <sys/devconf.h>
X#include <sys/syslog.h>
X
X#include <net/if.h>
X#include <net/if_dl.h>
X#include <net/if_types.h>
X
X#ifdef INET
X#include <netinet/in.h>
X#include <netinet/in_systm.h>
X#include <netinet/in_var.h>
X#include <netinet/ip.h>
X#include <netinet/if_ether.h>
X#endif
X
X#ifdef IPX
X#include <netipx/ipx.h>
X#include <netipx/ipx_if.h>
X#endif
X
X#ifdef NS
X#include <netns/ns.h>
X#include <netns/ns_if.h>
X#endif
X
X#if NBPFILTER > 0
X#include <net/bpf.h>
X#include <net/bpfdesc.h>
X#endif
X
X#include <vm/vm.h> /* for vtophys */
X#include <vm/vm_param.h> /* for vtophys */
X#include <vm/pmap.h> /* for vtophys */
X#include <machine/clock.h> /* for DELAY */
X
X#include <pci/pcivar.h>
X#include <pci/if_fxpreg.h>
X
Xstruct fxp_softc {
X struct arpcom arpcom; /* per-interface network data */
X caddr_t bpf; /* BPF token */
X struct fxp_csr *csr; /* control/status registers */
X struct fxp_cb_tx *cbl_base; /* base of TxCB list */
X struct fxp_cb_tx *cbl_first; /* first active TxCB in list */
X struct fxp_cb_tx *cbl_last; /* last active TxCB in list */
X struct mbuf *rfa_headm; /* first mbuf in receive frame area */
X struct mbuf *rfa_tailm; /* last mbuf in receive frame area */
X struct fxp_stats *fxp_stats; /* Pointer to interface stats */
X int tx_queued; /* # of active TxCB's */
X int promisc_mode; /* promiscuous mode enabled */
X};
X
X#include "fxp.h"
Xstatic struct fxp_softc *fxp_sc[NFXP]; /* XXX Yuck */
X
Xstatic u_long fxp_count;
X
X/*
X * Template for default configuration parameters.
X * See struct fxp_cb_config for the bit definitions.
X */
Xstatic u_char fxp_cb_config_template[] = {
X 0x0, 0x0, /* cb_status */
X 0x80, 0x2, /* cb_command */
X 0xff, 0xff, 0xff, 0xff, /* link_addr */
X 0x16, /* 0 */
X 0x8, /* 1 */
X 0x0, /* 2 */
X 0x0, /* 3 */
X 0x0, /* 4 */
X 0x80, /* 5 */
X 0xb2, /* 6 */
X 0x3, /* 7 */
X 0x1, /* 8 */
X 0x0, /* 9 */
X 0x26, /* 10 */
X 0x0, /* 11 */
X 0x60, /* 12 */
X 0x0, /* 13 */
X 0xf2, /* 14 */
X 0x48, /* 15 */
X 0x0, /* 16 */
X 0x40, /* 17 */
X 0xf3, /* 18 */
X 0x0, /* 19 */
X 0x3f, /* 20 */
X 0x5, /* 21 */
X 0x0, 0x0
X};
X
Xstatic inline int fxp_scb_wait __P((struct fxp_csr *));
Xstatic char *fxp_probe __P((pcici_t, pcidi_t));
Xstatic void fxp_attach __P((pcici_t, int));
Xstatic int fxp_shutdown __P((struct kern_devconf *, int));
Xstatic int fxp_intr __P((void *));
Xstatic void fxp_start __P((struct ifnet *));
Xstatic int fxp_ioctl __P((struct ifnet *, int, caddr_t));
Xstatic void fxp_init __P((struct ifnet *));
Xstatic void fxp_stop __P((struct fxp_softc *));
Xstatic void fxp_watchdog __P((int));
Xstatic void fxp_get_macaddr __P((struct fxp_softc *));
Xstatic int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
X
Xtimeout_t fxp_stats_update;
X
Xstatic struct pci_device fxp_device = {
X "fxp",
X fxp_probe,
X fxp_attach,
X &fxp_count,
X fxp_shutdown
X};
XDATA_SET(pcidevice_set, fxp_device);
X
X/*
X * Number of transmit control blocks. This determines the number
X * of transmit buffers that can be chained in the CB list.
X * This must be a power of two.
X */
X#define FXP_NTXCB 64
X
X/*
X * TxCB list index mask. This is used to do list wrap-around.
X */
X#define FXP_TXCB_MASK (FXP_NTXCB - 1)
X
X/*
X * Number of DMA segments in a TxCB. Note that this is carefully
X * chosen to make the total struct size an even power of two. It's
X * critical that no TxCB be split across a page boundry since
X * no attempt is made to allocate physically contiguous memory.
X *
X * XXX - don't forget to change the hard-coded constant in the
X * fxp_cb_tx struct (defined in if_fxpreg.h), too!
X */
X#define FXP_NTXSEG 29
X
X/*
X * Number of receive frame area buffers. These are large so chose
X * wisely.
X */
X#define FXP_NRFABUFS 32
X
X/*
X * Wait for the previous command to be accepted (but not necessarily
X * completed).
X */
Xstatic inline int
Xfxp_scb_wait(csr)
X struct fxp_csr *csr;
X{
X int i = 10000;
X
X while ((csr->scb_command & FXP_SCB_COMMAND_MASK) && --i);
X return (i);
X}
X
X/*
X * Return identification string if this is device is ours.
X */
Xstatic char *
Xfxp_probe(config_id, device_id)
X pcici_t config_id;
X pcidi_t device_id;
X{
X if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
X ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
X return ("Intel EtherExpress Pro/100B Fast Ethernet");
X
X return NULL;
X}
X
X/*
X * Allocate data structures and attach the device.
X */
Xstatic void
Xfxp_attach(config_id, unit)
X pcici_t config_id;
X int unit;
X{
X struct fxp_softc *sc;
X struct ifnet *ifp;
X vm_offset_t pbase;
X int s, i;
X
X sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
X if (sc == NULL)
X return;
X bzero(sc, sizeof(struct fxp_softc));
X
X s = splimp();
X
X /*
X * Map control/status registers.
X */
X if (!pci_map_mem(config_id, FXP_PCI_MMBA,
X (vm_offset_t *)&sc->csr, &pbase)) {
X printf("fxp%d: couldn't map memory\n", unit);
X goto fail;
X }
X
X /*
X * Issue a software reset.
X */
X sc->csr->port = 0;
X DELAY(10);
X
X /*
X * Allocate our interrupt.
X */
X if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
X printf("fxp%d: couldn't map interrupt\n", unit);
X goto fail;
X }
X
X sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
X M_DEVBUF, M_NOWAIT);
X if (sc->cbl_base == NULL)
X goto malloc_fail;
X
X sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
X if (sc->fxp_stats == NULL)
X goto malloc_fail;
X bzero(sc->fxp_stats, sizeof(struct fxp_stats));
X
X /*
X * Pre-allocate our receive buffers.
X */
X for (i = 0; i < FXP_NRFABUFS; i++) {
X if (fxp_add_rfabuf(sc, NULL) != 0) {
X goto malloc_fail;
X }
X }
X
X fxp_sc[unit] = sc;
X
X ifp = &sc->arpcom.ac_if;
X ifp->if_unit = unit;
X ifp->if_name = "fxp";
X ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
X ifp->if_ioctl = fxp_ioctl;
X ifp->if_output = ether_output;
X ifp->if_start = fxp_start;
X ifp->if_watchdog = fxp_watchdog;
X
X fxp_get_macaddr(sc);
X printf("fxp%d: Ethernet address %s\n", unit,
X ether_sprintf(sc->arpcom.ac_enaddr));
X
X /*
X * Attach the interface.
X */
X if_attach(ifp);
X#if NBPFILTER > 0
X bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
X#endif
X splx(s);
X return;
X
Xmalloc_fail:
X printf("fxp%d: Failed to malloc memory\n", unit);
X (void) pci_unmap_int(config_id);
X if (sc && sc->cbl_base)
X free(sc->cbl_base, M_DEVBUF);
X if (sc && sc->fxp_stats)
X free(sc->fxp_stats, M_DEVBUF);
X /* frees entire chain */
X if (sc && sc->rfa_headm)
X m_freem(sc->rfa_headm);
Xfail:
X if (sc)
X free(sc, M_DEVBUF);
X splx(s);
X}
X
X/*
X * Read station (MAC) address from serial EEPROM. Basically, you
X * manually shift in the read opcode (one bit at a time) and then
X * shift in the address, and then you shift out the data (all of
X * this one bit at a time). The word size is 16 bits, so you have
X * to provide the address for every 16 bits of data. The MAC address
X * is in the first 3 words (6 bytes total).
X */
Xstatic void
Xfxp_get_macaddr(sc)
X struct fxp_softc *sc;
X{
X struct fxp_csr *csr;
X u_short reg, *data;
X int i, x;
X
X csr = sc->csr;
X data = (u_short *)sc->arpcom.ac_enaddr;
X
X for (i = 0; i < 3; i++) {
X csr->eeprom_control = FXP_EEPROM_EECS;
X /*
X * Shift in read opcode.
X */
X for (x = 3; x > 0; x--) {
X if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
X reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
X } else {
X reg = FXP_EEPROM_EECS;
X }
X csr->eeprom_control = reg;
X csr->eeprom_control = reg | FXP_EEPROM_EESK;
X DELAY(1);
X csr->eeprom_control = reg;
X DELAY(1);
X }
X /*
X * Shift in address.
X */
X for (x = 6; x > 0; x--) {
X if (i & (1 << (x - 1))) {
X reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
X } else {
X reg = FXP_EEPROM_EECS;
X }
X csr->eeprom_control = reg;
X csr->eeprom_control = reg | FXP_EEPROM_EESK;
X DELAY(1);
X csr->eeprom_control = reg;
X DELAY(1);
X }
X reg = FXP_EEPROM_EECS;
X data[i] = 0;
X /*
X * Shift out data.
X */
X for (x = 16; x > 0; x--) {
X csr->eeprom_control = reg | FXP_EEPROM_EESK;
X DELAY(1);
X if (csr->eeprom_control & FXP_EEPROM_EEDO)
X data[i] |= (1 << (x - 1));
X csr->eeprom_control = reg;
X DELAY(1);
X }
X csr->eeprom_control = 0;
X DELAY(1);
X }
X}
X
X/*
X * Device shutdown routine. Usually called at system shutdown. The
X * main purpose of this routine is to shut off receiver DMA so that
X * kernel memory doesn't get clobbered during warmboot.
X */
Xstatic int
Xfxp_shutdown(kdc, force)
X struct kern_devconf *kdc;
X int force;
X{
X struct fxp_softc *sc = fxp_sc[kdc->kdc_unit];
X
X fxp_stop(sc);
X
X (void) dev_detach(kdc);
X return 0;
X}
X
X/*
X * Start packet transmission on the interface.
X */
Xstatic void
Xfxp_start(ifp)
X struct ifnet *ifp;
X{
X struct fxp_softc *sc = (struct fxp_softc *)ifp;
X struct fxp_csr *csr = sc->csr;
X struct fxp_cb_tx *txp;
X struct mbuf *m, *mb_head;
X int segment;
X
Xtxloop:
X /*
X * See if a TxCB is available. If not, indicate this to the
X * outside world and exit.
X */
X if (sc->tx_queued >= FXP_NTXCB) {
X ifp->if_flags |= IFF_OACTIVE;
X return;
X }
X /*
X * Grab a packet to transmit.
X */
X IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, mb_head);
X if (mb_head == NULL) {
X /*
X * No more packets to send.
X */
X return;
X }
X
X /*
X * Get pointer to next available (unused) descriptor.
X */
X txp = sc->cbl_last->next;
X
X /*
X * Go through each of the mbufs in the chain and initialize
X * the transmit buffers descriptors with the physical address
X * and size of the mbuf.
X */
Xtbdinit:
X for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
X if (m->m_len != 0) {
X if (segment == FXP_NTXSEG)
X break;
X txp->tbd[segment].tb_addr =
X vtophys(mtod(m, vm_offset_t));
X txp->tbd[segment].tb_size = m->m_len;
X segment++;
X }
X }
X if (m != NULL && segment == FXP_NTXSEG) {
X struct mbuf *mn;
X
X /*
X * We ran out of segments. We have to recopy this mbuf
X * chain first.
X */
X MGETHDR(mn, M_DONTWAIT, MT_DATA);
X if (mn == NULL) {
X m_freem(mb_head);
X return;
X }
X if (mb_head->m_pkthdr.len > MHLEN) {
X MCLGET(mn, M_DONTWAIT);
X if ((mn->m_flags & M_EXT) == 0) {
X m_freem(mn);
X m_freem(mb_head);
X return;
X }
X }
X m_copydata(mb_head, 0, mb_head->m_pkthdr.len, mtod(mn, caddr_t));
X mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
X m_freem(mb_head);
X mb_head = mn;
X goto tbdinit;
X }
X
X txp->tbd_number = segment;
X
X /*
X * Finish the initialization of this TxCB.
X */
X txp->cb_status = 0;
X txp->cb_command =
X FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
X txp->tx_threshold = 16; /* bytes*8 */
X txp->mb_head = mb_head;
X
X /*
X * Advance the end-of-list forward.
X */
X sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
X sc->cbl_last = txp;
X
X /*
X * If no packets were previously queued then advance the first
X * pointer to this TxCB.
X */
X if (sc->tx_queued++ == 0) {
X sc->cbl_first = txp;
X }
X
X if (!fxp_scb_wait(csr)) {
X /*
X * Hmmm, card has gone out to lunch
X */
X fxp_init(ifp);
X goto txloop;
X }
X
X /*
X * Resume transmission if suspended.
X */
X csr->scb_command = FXP_SCB_COMMAND_CU_RESUME;
X
X#if NBPFILTER > 0
X /*
X * Pass packet to bpf if there is a listener.
X */
X if (sc->bpf != NULL)
X bpf_mtap(sc->bpf, mb_head);
X#endif
X /*
X * Set a 5 second timer just in case we don't hear from the
X * card again.
X */
X ifp->if_timer = 5;
X
X goto txloop;
X}
X
X/*
X * Process interface interrupts. Returns 1 if the interrupt
X * was handled, 0 if it wasn't.
X */
Xstatic int
Xfxp_intr(arg)
X void *arg;
X{
X struct fxp_softc *sc = arg;
X struct fxp_csr *csr = sc->csr;
X struct ifnet *ifp = &sc->arpcom.ac_if;
X int found = 0;
X u_char statack;
X
X while ((statack = csr->scb_statack) != 0) {
X found = 1;
X /*
X * First ACK all the interrupts in this pass.
X */
X csr->scb_statack = statack;
X
X /*
X * Free any finished transmit mbuf chains.
X */
X if (statack & FXP_SCB_STATACK_CNA) {
X struct fxp_cb_tx *txp;
X
X for (txp = sc->cbl_first;
X (txp->cb_status & FXP_CB_STATUS_C) &&
X txp->mb_head != NULL;
X txp = txp->next) {
X m_freem(txp->mb_head);
X txp->mb_head = NULL;
X sc->tx_queued--;
X }
X sc->cbl_first = txp;
X /*
X * We unconditionally clear IFF_OACTIVE since it
X * doesn't hurt to do so even if the tx queue is
X * still full - it will just get set again in
X * fxp_start(). If we get a CNA interrupt, it is
X * (almost?) certain that we've freed up space for
X * at least one more packet.
X */
X ifp->if_flags &= ~IFF_OACTIVE;
X /*
X * Clear watchdog timer. It may or may not be set
X * again in fxp_start().
X */
X ifp->if_timer = 0;
X fxp_start(ifp);
X }
X /*
X * Process receiver interrupts. If a no-resource (RNR)
X * condition exists, get whatever packets we can and
X * re-start the receiver.
X */
X if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
X struct mbuf *m;
X struct fxp_rfa *rfa;
Xrcvloop:
X m = sc->rfa_headm;
X rfa = (struct fxp_rfa *)m->m_ext.ext_buf;
X
X if (rfa->rfa_status & FXP_RFA_STATUS_C) {
X /*
X * Remove first packet from the chain.
X */
X sc->rfa_headm = m->m_next;
X m->m_next = NULL;
X
X /*
X * Add a new buffer to the receive chain. If this
X * fails, the old buffer is recycled instead.
X */
X if (fxp_add_rfabuf(sc, m) == 0) {
X struct ether_header *eh;
X u_short total_len;
X
X total_len = rfa->actual_size & (MCLBYTES - 1);
X m->m_pkthdr.rcvif = ifp;
X m->m_pkthdr.len = m->m_len = total_len -
X sizeof(struct ether_header);
X eh = mtod(m, struct ether_header *);
X#if NBPFILTER > 0
X if (sc->bpf != NULL) {
X bpf_tap(sc->bpf, mtod(m, caddr_t), total_len);
X /*
X * Only pass this packet up if it is for us.
X */
X if ((ifp->if_flags & IFF_PROMISC) &&
X (rfa->rfa_status & FXP_RFA_STATUS_IAMATCH) &&
X (eh->ether_dhost[0] & 1) == 0) {
X m_freem(m);
X goto rcvloop;
X }
X }
X#endif
X m->m_data += sizeof(struct ether_header);
X ether_input(ifp, eh, m);
X }
X goto rcvloop;
X }
X if (statack & FXP_SCB_STATACK_RNR) {
X struct fxp_csr *csr = sc->csr;
X
X (void) fxp_scb_wait(csr);
X csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
X csr->scb_command = FXP_SCB_COMMAND_RU_START;
X }
X }
X }
X
X return found;
X}
X
X/*
X * Update packet in/out/collision statistics. The i82557 doesn't
X * allow you to access these counters without doing a fairly
X * expensive DMA to get _all_ of the statistics it maintains, so
X * we do this operation here only once per second. The statistics
X * counters in the kernel are updated from the previous dump-stats
X * DMA and then a new dump-stats DMA is started. The on-chip
X * counters are zeroed when the DMA completes. If we can't start
X * the DMA immediately, we don't wait - we just prepare to read
X * them again next time.
X */
Xvoid
Xfxp_stats_update(arg)
X void *arg;
X{
X struct fxp_softc *sc = arg;
X struct ifnet *ifp = &sc->arpcom.ac_if;
X struct fxp_stats *sp = sc->fxp_stats;
X
X ifp->if_opackets += sp->tx_good;
X ifp->if_collisions += sp->tx_total_collisions;
X ifp->if_ipackets += sp->rx_good;
X ifp->if_ierrors +=
X sp->rx_crc_errors +
X sp->rx_alignment_errors +
X sp->rx_rnr_errors +
X sp->rx_overrun_errors +
X sp->rx_shortframes;
X /*
X * If there is no pending command, start another stats
X * dump. Otherwise punt for now.
X */
X if ((sc->csr->scb_command & FXP_SCB_COMMAND_MASK) == 0) {
X /*
X * Start another stats dump. By waiting for it to be
X * accepted, we avoid having to do splhigh locking when
X * writing scb_command in other parts of the driver.
X */
X sc->csr->scb_command = FXP_SCB_COMMAND_CU_DUMPRESET;
X (void) fxp_scb_wait(sc->csr);
X } else {
X /*
X * A previous command is still waiting to be accepted.
X * Just zero our copy of the stats and wait for the
X * next timer event to update them.
X */
X sp->tx_good = 0;
X sp->tx_total_collisions = 0;
X
X sp->rx_good = 0;
X sp->rx_crc_errors = 0;
X sp->rx_alignment_errors = 0;
X sp->rx_rnr_errors = 0;
X sp->rx_overrun_errors = 0;
X sp->rx_shortframes = 0;;
X }
X /*
X * Schedule another timeout one second from now.
X */
X timeout(fxp_stats_update, sc, hz);
X}
X
X/*
X * Stop the interface. Cancels the statistics updater and resets
X * the interface.
X */
Xstatic void
Xfxp_stop(sc)
X struct fxp_softc *sc;
X{
X struct ifnet *ifp = &sc->arpcom.ac_if;
X struct fxp_cb_tx *txp;
X int i;
X
X /*
X * Cancel stats updater.
X */
X untimeout(fxp_stats_update, sc);
X
X /*
X * Issue software reset
X */
X sc->csr->port = 0;
X DELAY(10);
X
X /*
X * Release any xmit buffers.
X */
X for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
X txp = txp->next) {
X m_freem(txp->mb_head);
X txp->mb_head = NULL;
X }
X sc->tx_queued = 0;
X
X /*
X * Free all the receive buffers then reallocate/reinitialize
X */
X if (sc->rfa_headm != NULL)
X m_freem(sc->rfa_headm);
X sc->rfa_headm = NULL;
X sc->rfa_tailm = NULL;
X for (i = 0; i < FXP_NRFABUFS; i++) {
X if (fxp_add_rfabuf(sc, NULL) != 0) {
X /*
X * This "can't happen" - we're at splimp()
X * and we just freed all the buffers we need
X * above.
X */
X panic("fxp_stop: no buffers!");
X }
X }
X
X ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
X ifp->if_timer = 0;
X}
X
X/*
X * Watchdog/transmission transmit timeout handler. Called when a
X * transmission is started on the interface, but no interrupt is
X * received before the timeout. This usually indicates that the
X * card has wedged for some reason.
X */
Xstatic void
Xfxp_watchdog(unit)
X int unit;
X{
X struct ifnet *ifp = (struct ifnet *)fxp_sc[unit];
X
X log(LOG_ERR, "fxp%d: device timeout\n", unit);
X ifp->if_oerrors++;
X
X fxp_init(ifp);
X}
X
Xstatic void
Xfxp_init(ifp)
X struct ifnet *ifp;
X{
X struct fxp_softc *sc = (struct fxp_softc *)ifp;
X struct fxp_cb_config *cbp;
X struct fxp_cb_ias *cb_ias;
X struct fxp_cb_tx *txp;
X struct fxp_csr *csr = sc->csr;
X int i, s, mcast, prm;
X
X s = splimp();
X /*
X * Cancel any pending I/O
X */
X fxp_stop(sc);
X
X prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
X sc->promisc_mode = prm;
X /*
X * Sleeze out here and enable reception of all multicasts if
X * multicasts are enabled. Ideally, we'd program the multicast
X * address filter to only accept specific multicasts.
X */
X mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0;
X
X /*
X * Initialize base of CBL and RFA memory. Loading with zero
X * sets it up for regular linear addressing.
X */
X csr->scb_general = 0;
X csr->scb_command = FXP_SCB_COMMAND_CU_BASE;
X
X (void) fxp_scb_wait(csr);
X csr->scb_command = FXP_SCB_COMMAND_RU_BASE;
X
X /*
X * Initialize base of dump-stats buffer.
X */
X (void) fxp_scb_wait(csr);
X csr->scb_general = vtophys(sc->fxp_stats);
X csr->scb_command = FXP_SCB_COMMAND_CU_DUMP_ADR;
X
X /*
X * We temporarily use memory that contains the TxCB list to
X * construct the config CB. The TxCB list memory is rebuilt
X * later.
X */
X cbp = (struct fxp_cb_config *) sc->cbl_base;
X
X /*
X * This bcopy is kind of disgusting, but there are a bunch of must be
X * zero and must be one bits in this structure and this is the easiest
X * way to initialize them all to proper values.
X */
X bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config));
X
X cbp->cb_status = 0;
X cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
X cbp->link_addr = -1; /* (no) next command */
X cbp->byte_count = 22; /* (22) bytes to config */
X cbp->rx_fifo_limit = 8; /* rx fifo threshold */
X cbp->tx_fifo_limit = 0; /* tx fifo threshold */
X cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
X cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
X cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
X cbp->dma_bce = 1; /* (enable) dma max counters */
X cbp->late_scb = 0; /* (don't) defer SCB update */
X cbp->tno_int = 0; /* (disable) tx not okay interrupt */
X cbp->ci_int = 0; /* (do) interrupt on CU not active */
X cbp->save_bf = prm; /* save bad frames */
X cbp->disc_short_rx = !prm; /* discard short packets */
X cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
X cbp->mediatype = 1; /* (MII) interface mode */
X cbp->nsai = 1; /* (don't) disable source addr insert */
X cbp->preamble_length = 2; /* (7 byte) preamble */
X cbp->loopback = 0; /* (don't) loopback */
X cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
X cbp->linear_pri_mode = 0; /* (wait after xmit only) */
X cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
X cbp->promiscuous = prm; /* promiscuous mode */
X cbp->bcast_disable = 0; /* (don't) disable broadcasts */
X cbp->crscdt = 0; /* (CRS only) */
X cbp->stripping = !prm; /* truncate rx packet to byte count */
X cbp->padding = 1; /* (do) pad short tx packets */
X cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
X cbp->force_fdx = 0; /* (don't) force full duplex */
X cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
X cbp->multi_ia = 0; /* (don't) accept multiple IAs */
X cbp->mc_all = mcast; /* accept all multicasts */
X
X /*
X * Start the config command/DMA.
X */
X (void) fxp_scb_wait(csr);
X csr->scb_general = vtophys(cbp);
X csr->scb_command = FXP_SCB_COMMAND_CU_START;
X /* ...and wait for it to complete. */
X while (!(cbp->cb_status & FXP_CB_STATUS_C));
X
X /*
X * Now initialize the station address. Temporarily use the TxCB
X * memory area like we did above for the config CB.
X */
X cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
X cb_ias->cb_status = 0;
X cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
X cb_ias->link_addr = -1;
X bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
X sizeof(sc->arpcom.ac_enaddr));
X
X /*
X * Start the IAS (Individual Address Setup) command/DMA.
X */
X (void) fxp_scb_wait(csr);
X csr->scb_command = FXP_SCB_COMMAND_CU_START;
X /* ...and wait for it to complete. */
X while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
X
X /*
X * Initialize transmit control block (TxCB) list.
X */
X
X txp = sc->cbl_base;
X bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
X for (i = 0; i < FXP_NTXCB; i++) {
X txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
X txp[i].cb_command = FXP_CB_COMMAND_NOP;
X txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]);
X txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
X txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
X }
X /*
X * Set the stop flag on the first TxCB and start the control
X * unit. It will execute the NOP and then suspend.
X */
X txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
X sc->cbl_first = sc->cbl_last = txp;
X sc->tx_queued = 0;
X
X (void) fxp_scb_wait(csr);
X csr->scb_command = FXP_SCB_COMMAND_CU_START;
X
X /*
X * Initialize receiver buffer area - RFA.
X */
X (void) fxp_scb_wait(csr);
X csr->scb_general = vtophys(sc->rfa_headm->m_ext.ext_buf);
X csr->scb_command = FXP_SCB_COMMAND_RU_START;
X
X ifp->if_flags |= IFF_RUNNING;
X ifp->if_flags &= ~IFF_OACTIVE;
X splx(s);
X
X /*
X * Start stats updater.
X */
X timeout(fxp_stats_update, sc, hz);
X}
X
X/*
X * Add a buffer to the end of the RFA buffer list.
X * Return 0 if successful, 1 for failure. A failure results in
X * adding the 'oldm' (if non-NULL) on to the end of the list -
X * tossing out it's old contents and recycling it.
X * The RFA struct is stuck at the beginning of mbuf cluster and the
X * data pointer is fixed up to point just past it.
X */
Xstatic int
Xfxp_add_rfabuf(sc, oldm)
X struct fxp_softc *sc;
X struct mbuf *oldm;
X{
X struct mbuf *m;
X struct fxp_rfa *rfa, *p_rfa;
X
X MGETHDR(m, M_DONTWAIT, MT_DATA);
X if (m != NULL) {
X MCLGET(m, M_DONTWAIT);
X if ((m->m_flags & M_EXT) == 0) {
X m_freem(m);
X m = oldm;
X }
X } else {
X m = oldm;
X }
X if (m == NULL)
X return 1;
X rfa = mtod(m, struct fxp_rfa *);
X rfa->rfa_status = 0;
X rfa->rfa_control = FXP_RFA_CONTROL_EL;
X rfa->link_addr = -1;
X rfa->rbd_addr = -1;
X rfa->actual_size = 0;
X rfa->size = MCLBYTES - sizeof(struct fxp_rfa);
X m->m_data += sizeof(struct fxp_rfa);
X /*
X * If there are other buffers already on the list, attach this
X * one to the end by fixing up the tail to point to this one.
X */
X if (sc->rfa_headm != NULL) {
X p_rfa = (struct fxp_rfa *) sc->rfa_tailm->m_ext.ext_buf;
X sc->rfa_tailm->m_next = m;
X p_rfa->link_addr = vtophys(rfa);
X p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
X } else {
X sc->rfa_headm = m;
X }
X sc->rfa_tailm = m;
X
X return (m == oldm);
X}
X
Xstatic int
Xfxp_ioctl(ifp, command, data)
X struct ifnet *ifp;
X int command;
X caddr_t data;
X{
X struct ifaddr *ifa = (struct ifaddr *) data;
X struct fxp_softc *sc = (struct fxp_softc *)ifp;
X struct ifreq *ifr = (struct ifreq *) data;
X int s, error = 0;
X
X s = splimp();
X
X switch (command) {
X
X case SIOCSIFADDR:
X ifp->if_flags |= IFF_UP;
X
X switch (ifa->ifa_addr->sa_family) {
X#ifdef INET
X case AF_INET:
X fxp_init(ifp); /* before arpwhohas */
X arp_ifinit((struct arpcom *)ifp, ifa);
X break;
X#endif
X#ifdef IPX
X /*
X * XXX - This code is probably wrong
X */
X case AF_IPX:
X {
X register struct ipx_addr *ina = &(IA_SIPX(ifa)->sipx_addr);
X
X if (ipx_nullhost(*ina))
X ina->x_host =
X *(union ipx_host *) (sc->arpcom.ac_enaddr);
X else {
X bcopy((caddr_t) ina->x_host.c_host,
X (caddr_t) sc->arpcom.ac_enaddr,
X sizeof(sc->arpcom.ac_enaddr));
X }
X
X /*
X * Set new address
X */
X fxp_init(ifp);
X break;
X }
X#endif
X#ifdef NS
X /*
X * XXX - This code is probably wrong
X */
X case AF_NS:
X {
X register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
X
X if (ns_nullhost(*ina))
X ina->x_host =
X *(union ns_host *) (sc->arpcom.ac_enaddr);
X else {
X bcopy((caddr_t) ina->x_host.c_host,
X (caddr_t) sc->arpcom.ac_enaddr,
X sizeof(sc->arpcom.ac_enaddr));
X }
X
X /*
X * Set new address
X */
X fxp_init(ifp);
X break;
X }
X#endif
X default:
X fxp_init(ifp);
X break;
X }
X break;
X
X case SIOCGIFADDR:
X {
X struct sockaddr *sa;
X
X sa = (struct sockaddr *) & ifr->ifr_data;
X bcopy((caddr_t) sc->arpcom.ac_enaddr,
X (caddr_t) sa->sa_data, sizeof(sc->arpcom.ac_enaddr));
X }
X break;
X
X case SIOCSIFFLAGS:
X
X /*
X * If interface is marked up and not running, then start it.
X * If it is marked down and running, stop it.
X * XXX If it's up then re-initialize it. This is so flags
X * such as IFF_PROMISC are handled.
X */
X if (ifp->if_flags & IFF_UP) {
X fxp_init(ifp);
X } else {
X if (ifp->if_flags & IFF_RUNNING)
X fxp_stop(sc);
X }
X break;
X
X case SIOCADDMULTI:
X case SIOCDELMULTI:
X /*
X * Update out multicast list.
X */
X error = (command == SIOCADDMULTI) ?
X ether_addmulti(ifr, &sc->arpcom) :
X ether_delmulti(ifr, &sc->arpcom);
X
X if (error == ENETRESET) {
X /*
X * Multicast list has changed; set the hardware filter
X * accordingly.
X */
X fxp_init(ifp);
X
X error = 0;
X }
X break;
X
X case SIOCSIFMTU:
X /*
X * Set the interface MTU.
X */
X if (ifr->ifr_mtu > ETHERMTU) {
X error = EINVAL;
X } else {
X ifp->if_mtu = ifr->ifr_mtu;
X }
X break;
X
X default:
X error = EINVAL;
X }
X (void) splx(s);
X return (error);
X}
END-of-if_fxp.c
exit
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