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Newsgroups: comp.os.386bsd.misc Path: sserve!newshost.anu.edu.au!munnari.oz.au!news.Hawaii.Edu!ames!pacbell.com!ihnp4.ucsd.edu!library.ucla.edu!europa.eng.gtefsd.com!howland.reston.ans.net!pipex!uknet!festival!edcogsci!richard From: richard@cogsci.ed.ac.uk (Richard Tobin) Subject: Re: Shared Library Status ? Message-ID: <CMnsJw.8p8@cogsci.ed.ac.uk> Organization: HCRC, University of Edinburgh References: <michaelv.763331698@ponderous.cc.iastate.edu> <2lqck0$11k@pdq.coe.montana.edu> <michaelv.763634402@ponderous.cc.iastate.edu> Date: Mon, 14 Mar 1994 14:35:55 GMT Lines: 21 In article <michaelv.763634402@ponderous.cc.iastate.edu> michaelv@iastate.edu (Michael L. VanLoon) writes: >90% sez who? :-) 90% under DOS, maybe. I don't think a multi-tasking >OS that serves several-hundred interrupts per second and allocates >processor time between several running processes with resident memory >sets in the meg range is going to get an average 90% hit rate with an >8k cache. I'd be pleased to be proven wrong on this point, though. What difference do the interrupts make? They don't require cache flushes. As for the process switching, the machine still executes ~1E6 instructions between switches. I wouldn't be surprised by >90% hits. Of course, that's just my guess. If you want figures, I suggest posting to comp.arch. I believe that some systems (eg Mips) make it reasonably easy to measure this sort of thing. -- Richard -- Richard Tobin, HCRC, Edinburgh University R.Tobin@ed.ac.uk "Your monkey has got it right, sir." - HHGTTG