Return to BSD News archive
Newsgroups: comp.os.386bsd.development Path: sserve!newshost.anu.edu.au!munnari.oz.au!sgiblab!swrinde!elroy.jpl.nasa.gov!decwrl!netcomsv!netcom.com!jmonroy From: jmonroy@netcom.com (Jesus Monroy Jr) Subject: Re: [FreeBSD 1.0R] DMA Problems? Message-ID: <jmonroyCJ3ts3.1Ls@netcom.com> Organization: NETCOM On-line Communication Services (408 241-9760 guest) X-Newsreader: TIN [version 1.2 PL1] References: <CHCErs.G5w@genesis.nred.ma.us> <2dj25i$1ga@u.cc.utah.edu> <2encotINN3sq@bonnie.sax.de> <2eqjt7$dqm@u.cc.utah.edu> <CI6291.HBA@genesis.nred.ma.us> <2fbvtoINNk71@bonnie.sax.de> <jmonroyCIJFAr.Atn@netcom.com> <2g4kjvINNnsf@bonnie.sax.de> Date: Tue, 4 Jan 1994 12:09:38 GMT Lines: 45 J Wunsch (j@uriah.sax.de) wrote: : In <jmonroyCIJFAr.Atn@netcom.com> jmonroy@netcom.com (Jesus Monroy Jr) writes: : > Seriously, the quesiton about DMA RAM refresh has an answer. : [...] : > What does this prove? : > --------------------- : > Namely that the RAM refresh is controllable via : > the i8254 timer on the IBM/ISA architecture. : > : Yes. But this doesn't prove they do the refresh via an DMA channel zero : request. They simply continue using the timer... : If this doesn't prove the point please state why. : Actually, i know of a sample hardware application that used DMA channel 0 : to get fast i/o done on a DAC. They totally re-programmed the DMA channel, : without losing dRAM refresh. Maybe they didn't reprogram the timer, though. : It's been too long ago, i don't remember the exact things. : I am sorry to seem a bit irritated on this but, I seem to bring facts and proof. While some people bring their "best recollections"... Kinda reminds me of waterfate :-). : As another point, as far as i know, all of the modern chipsets avoid re- : freshing all the memory banks at the same time in order to reduce power : current peaks. They rather split the refresh cycles across the memory : banks. Tell me, how should the DMA channel achieve this? : Blink... what does "all of the modern chipsets" mean? Does this mean chipsets made after 1992/1991/1990? Is this really the point? And please explain to me why your not reading the Data Guide? -- Jesus Monroy Jr jmonroy@netcom.com Zebra Research /386BSD/device-drivers /fd /qic /clock /documentation ___________________________________________________________________________